1. Field of the Disclosure
The present embodiments relates to methods, systems, and programs for optimizing Critical Dimension Uniformity (CDU) during the processing of a semiconductor substrate.
2. Description of the Related Art
In semiconductor manufacturing, etching processes are commonly and repeatedly carried out. While processing the wafer, a plasma is created that contains various types of radicals, as well as positive and negative ions. The chemical reactions of the various radicals, positive ions, and negative ions are used to etch features, surfaces and materials of a wafer. During the etching process, a chamber coil performs a function analogous to that of a primary coil in a transformer, while the plasma performs a function analogous to that of a secondary coil in the transformer.
In some chambers, the radio frequency (RF) provided to the coil is pulsed, which generally means the level of RF may be varied, e.g., there are times when the RF is ON and times when the RF is OFF, or the RF is alternated via the application of two different frequencies.
In some semiconductors, such as memory chips, a certain pattern is repeated over the surface of the substrate. In one operation, the pattern includes the creation of holes, and it is important that the sizes of the holes are uniform to obtain consistent performance across the different sections of the memory chip. It is desired that the chip has good intra-cell uniformity as well as overall wafer uniformity.
It is in this context that embodiments arise.